build To Spec product development

fpga_icon   FPGA/ASIC/DO-254 Services

ALTEN GT has over 31 years of experience in PLD (FPGA) development and over 20 years in V&V as per DO-254 process. The experience has been in directly dealing with FAA and FAA DERs for over a dozen programs.

Developed FPGA leading to complex signal processing ASICs including in-built CPUs at 90nm and 28nm low power technologies, successfully fabricated at TSMC and Global Foundry.

ALTEN GT is skilled in Development of PLD/FPGA programs using VHDL or Verilog and PLD/FPGA to ASIC Conversion.

Faster Development time with Re-usable IP for ARINC 429, MIL 1553, Correlator, FFT blocks, finite state machines results in savings in Cost and a reduced Schedule.

ALTEN GT offers the following services in the DO-254 area:

  • Development of PLD algorithms using VHDL or Verilog
  • System Requirement validation as per applicable standards
  • Functional & timing Simulation
  • Static Timing Analysis
  • Coverage Analysis
  • FPGA to ASIC migration
  • Development of re-usable IP’s for communication interfaces and GNSS Baseband processors
  • GNSS Baseband IP is silicon proven on 40 nm, 90 nm and 130 nm processes
  • Multiple V & V programs adhering to DO-254 DAL C through DAL A for several customers
  • ALTEN GT has its own standards and checklists with compliance and documentation to DO-254 standards

ALTEN GT has worked on the FPGA devices listed below:

Vendor Xilinx Altera Actel Lattice
Devices XC6VLX240, XC6VLX195, XC6SLX150, XC4VLX160, XC3S5000, XC3S2000, XC3S1500, XC2S30, XCV600, XC2S400E, XC3S200, Spartan-3, Spartn-6, Virtex-4, and Virtex-6 families, Artix-7, Kintex-7, Zynq families MAX7256, MAX3128, EPM7256A RT1280 (Rad Hard), A3P400, A3P 600 (Pro ASIC 3) LFSC15 (Serdes)